Why This Topic Is Important for ECET 2026
ADC (Analog to Digital Converter) and DAC (Digital to Analog Converter) are the bridge between real-world signals and digital systems.
In ECET 2026, questions come from:
- Resolution
- Step size
- Conversion time
- Quantization error
- Weighted resistor & R-2R DAC
- SAR, Flash ADC
All these give easy, formula-based scoring questions.
📘 Concept Notes
1. What is an ADC?
An ADC converts analog voltage into a digital code.
Example: Mike voltage 0–5V converted into 8-bit number 0–255.
Important ADC Types
a) Flash ADC (Parallel ADC)
- Fastest ADC
- Uses comparator array
- For n-bit ADC → requires 2ⁿ − 1 comparators
- Used in high-speed systems (radar, video)
b) SAR ADC (Successive Approximation ADC)
- Most commonly used
- Medium speed, good accuracy
- Uses a successive approximation register
c) Dual Slope ADC
- Very accurate
- Used in digital multimeters
- Slow but noise-free
2. ADC Terms
Resolution
Number of bits of output.
More bits → smaller step size → better accuracy.
Step Size
Difference in analog voltage between two digital levels.
Formula:
Example:
8-bit, 5V →
Quantization Error
Maximum error = ± half step.
Total Levels
3. DAC (Digital to Analog Converter)
DAC converts digital number → analog voltage.
DAC Types
a) Weighted Resistor DAC
Each bit uses a weighted resistor (R, 2R, 4R, 8R…)
Output voltage:
b) R-2R Ladder DAC
- Uses only R and 2R resistors
- Most stable and commonly used
Output voltage formula:
where D = decimal equivalent of binary input.
⚙️ Formulas (QuickLaTeX Only)
🔟 10 MCQs (Concept + Numeric)
Q1. A 3-bit ADC has reference voltage 8V. What is the step size?
Q2. Number of comparators required for a 4-bit Flash ADC:
a) 4
b) 8
c) 15
d) 16
Q3. The quantization error of a 10-bit ADC with 5V reference is:
Q4. For SAR ADC, conversion time depends on:
a) Clock cycles
b) Number of bits
c) Both a and b
d) None
Q5. Resolution of 12-bit ADC:
a) 
b) 
c) 
d) 
Q6. A weighted resistor DAC with input 1100 (4-bit) and Vref = 8V gives output:
Q7. Step size of 8-bit ADC (Vref = 10V):
a) 39 mV
b) 78 mV
c) 10 mV
d) 0.1 mV
Q8. R-2R DAC formula for output is:
a) Linear
b) Logarithmic
c) Exponential
d) Sinusoidal
Q9. A 6-bit ADC can represent how many levels?
Q10. In a DAC, if digital input increases, analog output:
a) Decreases
b) Increases
c) Remains same
d) Becomes zero
✅ Answer Key (Copy–Paste Table)
| Q No | Answer |
|---|---|
| Q1 | 1V |
| Q2 | c |
| Q3 | ±0.00244V |
| Q4 | c |
| Q5 | a |
| Q6 | 6V |
| Q7 | 39 mV |
| Q8 | a |
| Q9 | 64 |
| Q10 | b |
🧠 Explanations
Q1:
Step size = 
Q2:
Flash ADC comparators = 
Q3:
Step = 
Error = ± half step = 
Q4:
SAR uses n comparison cycles → both bits & clock → (c).
Q5:
Resolution = 
Q6:
Binary 1100 = decimal 12.
Output = 
Q7:
Step = 
Q8:
DAC output equation is linear → (a).
Q9:
Levels = 
Q10:
Digital ↑ → analog ↑ → (b).
🎯 Motivation for ECET 2026
ADC/DAC is one of the highest scoring chapters:
- All problems are formula-based
- Easily solvable under 30 seconds
- Often 1–2 questions appear every year
Mastering these gives your total score a straight boost.
📲 CTA
👉 Join our WHATSAPP group for ECET 2026 updates & discussions:
https://chat.whatsapp.com/GniYuv3CYVDKjPWEN086X9
